1. Field of the Invention
The present invention relates to a charge detection device and a charge detection method, a solid-state imaging device and a driving method thereof, and an imaging device. More particularly, the present invention relates to a charge detection device and a charge detection method which detect accumulated signal charges by changing a threshold voltage of a transistor, a solid-state imaging device using the charge detection device and a driving method thereof, and an imaging device using the solid-state imaging device.
2. Description of the Related Art
A solid-state imaging device may be roughly classified into a CCD (Charge Coupled Device) type image sensor and a CMOS (Complementary MOS) type image sensor. In the solid-state imaging device, FD (Floating Diffusion), FG (Floating Gate), or BCD (Bulk Charge Detection) is used for a charge detection device when converting signal charges into a voltage signal.
Here, the FD may not avoid KTC noise due to thermal fluctuation in charges because of its structure. On the other hand, the BCD is the non-destructive read, thereby removing the KTC noise.
FIG. 9 is a schematic diagram illustrating the configuration of a solid-state imaging device using the BCD of the related art.
In the solid-state imaging device illustrated here, an annular gate 101 constituting a transistor is formed and an N+-type source region 104 is formed on the surface of an N-type well 103 of a P-type substrate 102 corresponding to a center opening between gates. An N+-type drain region 105 is formed on the N-type well 103 corresponding to the periphery of the gate 101. An annular P-type channel region 106 is formed between the source region 104 and the drain region 105, and an annular N+-type charge accumulation region 107 is formed below the channel region 106 (for example, see JP-A-10-41493).
In the solid-state imaging device constituted as described above, a threshold voltage of the transistor is changed by signal charges accumulated in the charge accumulation region 107, and a resistance value between the gate and the drain is changed. Therefore, the signal charges accumulated in the charge accumulation region 107 may be detected by measuring the potential of the source. The signal charges are swept into the drain region 105 by applying a reset voltage thereto when the detection has been completed.